Abstract The growth and diversification of the Internet imposes increasing demands on the performance and functionality of network infrastructure. The market for Internet Service Providers (ISP) is positioned to accept new premium service offerings such as voice over IP (VoIP), online gaming, music downloads, video on demand (VoD), and streaming video services, such as IP-TV. Routers, the devices responsible for the switching and directing of traffic in the Internet, are being called upon to not only handle increased volumes of traffic at higher speeds, but also provide Quality of Service that requires more complex per-hop packet processing. Exponential growth of network rates that is observed over last decade increases requirements for processing speed of routers. Since growth of processing power of routers is much slower, parallel packet processing mechanisms are required to provide packet processing at line rate.
This thesis addresses the problem of high-speed differentiated Quality of Service provisioning. We propose an implementation of DiffServ-over-MPLS Traffic Engineering (TE) architecture, and describe the implementation of its functional blocks on Intel IXP2400 network processor using Intel IXA SDK 4.1 framework. As a part of overall architecture we describe the implementation of fast and scalable 6-tuple range classifier, which allows traffic policing procedures to operate on per-flow level. Limitations and shortcomings of IXP2400 network processor are discussed. The proposed implementation supports 4096 rules and can provide 2.4 Gbps line rate with average processing latency less than 100 microseconds.

(M.S. Thesis) Djakhongir Siradjev, Young-Tak Kim - Fast Packet Processing with Network Processor for QoS-guaranteed DiffServ-over-MPLS Service Provisioning.pdf